The ADSP-21375 SHARC processor family offers the highest MFLOP performance for a variety of applications. The ADSP-21375 device is pin-compatible and code-compatible with prior SHARC Processors such as the ADSP-21367 and ADSP-21369. This member of the SHARC Processor family is based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats, making them particularly suitable for cost optimized high precision applications.

SHARC Processors also integrate many peripherals designed to simplify hardware design, minimize system design risks and reduce end-customer time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include, but are not limited to, serial ports and SPI ports block.