The fourth generation of SHARC processors, now includes the ADSP-21483, ADSP-21486, ADSP-21487, ADSP-21489 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals and new memory configurations capable of supporting the latest surround-sound decoder algorithms. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats making them particularly suitable for high-performance audio applications.

The ADSP-21483 offers the highest performance 400MHz/2400 MFLOPs in an LQFP package within the fourth generation SHARC Processor family. This level of performance makes the ADSP-21483 particularly well suited to address the consumer audio segment. In addition to its high core performance, the ADSP-21483 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.