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500MHz TigerSHARC Processor with 4MB On-chip Embedded DRAM

Model: ADSP-TS203S

  • Static superscalar architecture which supports 1-, 8-, 16- and 32-bit fixed point as well as floating point data processing
  • High performance 500MHz, 2.0ns instruction rate DSP core
  • 4MB on-chip embedded DRAM internally organized in four banks with user-defined partitioning
  • 10 channel, zero overhead DMA controller
  • Four internal 128-bit wide internal buses providing total memory bandwidth of 32Gbps
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500MHz TigerSHADSP-TS203S is member of TigerSHARC processor family. Targeted at numerous signal processing applications that rely on multiple processors working together to execute computationally-intensive real-time functions, ADI's TigerSHARC Processor is well-suited to video and communication markets as well as defense, medical imaging, industrial instrumentation. The ADSP-TS203S features static superscaler architecture which combines RISC, VLIW and standard DSP functionality. Native support of fixed and floating point data types, coupled with leading edge multiprocessing capabilities allows TigerSHARC processor to offer unrivaled DSP performance. At 500MHz clock rate, ADSP-TS203S offers industry's highest 16-bit fixed-point and 32-bit floating-point performance. The ADSP-TS203S has 32-bit 1024-point complex FFT time of 20.2 microseconds and provides 1500 MFLOPs per watt. RC processor with 4MB on-chip embedded DRAM.
  • Static superscalar architecture which supports 1-, 8-, 16- and 32-bit fixed point as well as floating point data processing
  • High performance 500MHz, 2.0ns instruction rate DSP core
  • 4MB on-chip embedded DRAM internally organized in four banks with user-defined partitioning
  • 10 channel, zero overhead DMA controller
  • Four internal 128-bit wide internal buses providing total memory bandwidth of 32Gbps
  • Single instruction multiple-data (SIMD) operation supported by two computation blocks each with ALU, multiplier, shifter and 32-word register file
  • Assembly and C language programmability
 
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